| 摘要 |
<P>PROBLEM TO BE SOLVED: To more efficiently evaluate tamper resistance of an encryption processing circuit. <P>SOLUTION: The consumption electric power data is obtained by a plurality of sets in which a state variable representing a state of an input bit A at an evaluation circuit which is an encryption processing circuit is associated with a power consumption W of the evaluation circuit. Then, on the basis of the plurality of sets of consumption electric power data that are obtained, a multiple regression analysis is performed with the power consumption W as a target variable and the state variable that is associated with the power consumption W as an explanatory variable, for deriving a determination factor R<SP POS="POST">2</SP>and partial regression factors a1-a8 as analysis values on the basis of analysis (step S240). Then, on the basis of the analysis value that has been derived, a tamper resistance of the evaluation circuit is evaluated (steps S251-S256). Consequently, tamper resistance of the encryption process circuit is efficiently evaluated when compared with a case in which a power difference analysis attack is performed by a plurality of times and tamper resistance is evaluated on the basis of the fact whether the attack has succeeded or not. <P>COPYRIGHT: (C)2013,JPO&INPIT |
