发明名称 |
Tri-level dynamic element matcher allowing reduced reference loading and DAC element reduction |
摘要 |
<p>Systems and methods using the same to achieve a tri-level multi-bit delta-sigma DAC having reduced power consumption and voltage droop have been achieved. A new rotation-based first order noise-shaping Dynamic Element Matcher (DEM) technique for use with 3-level unit elements have been disclosed. Reduced reference loading has been achieved when the tri-level DEM scheme is applied to switched capacitor implementations in particular. Furthermore a differential switched-capacitor DAC implementation, which enables use of the DEM technique is disclosed. The invention allows reduced circuit complexity required to implement a N-bit DAC when constructed using 3-level unit elements.</p> |
申请公布号 |
EP2237424(B1) |
申请公布日期 |
2013.02.27 |
申请号 |
EP20090368009 |
申请日期 |
2009.03.30 |
申请人 |
DIALOG SEMICONDUCTOR GMBH |
发明人 |
MYLES ANDREW;TERRY, ANDREW |
分类号 |
H03M1/08;H03M1/06;H03M1/80 |
主分类号 |
H03M1/08 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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