发明名称 MEMORY ARRANGEMENT
摘要 A memory system having a plurality of control lines, to individual lines of which impulses from a source of constant current may be selectively applied, each line being provided with inductive feed, and having a termination at the feed end thereof at least corresponding approximately with its wave resistance, the other ends of the parallel control lines being interconnected at least in groups with return flow being effected over other of associated lines whereby such connecting points are not led to a ground or other specific return line to improve the characteristics of the control lines as wave conductors and shorten the buildup processes associated with the return current, and thereby achieve an increase in operating speeds.
申请公布号 US3648262(A) 申请公布日期 1972.03.07
申请号 USD3648262 申请日期 1969.06.25
申请人 SIEMENS AG. 发明人 HERMANN KADOW
分类号 G11C5/06;G11C7/02;G11C11/06;H03K19/00;H03K19/0175;(IPC1-7):G11C7/00 主分类号 G11C5/06
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