发明名称 Method for producing a three-dimensional integrated circuit
摘要 The method involves producing a substrate comprising semiconductor layers between which a third material layer i.e. sacrificial layer, is placed. Metal oxide semiconductor (MOS) transistor (140) e.g. P channel MOS transistor, whose active area is formed in a portion of one of the semiconductor layers, is formed. Another MOS transistor (172), whose active area is formed in a silicon portion (152) of another semiconductor layer, is formed. The active area of the latter MOS device is placed between a gate material (162) of the latter MOS transistor and the active area of the former transistor.
申请公布号 EP2562802(A2) 申请公布日期 2013.02.27
申请号 EP20120181068 申请日期 2012.08.20
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIESALTERNATIVES 发明人 PREVITALI, BERNARD
分类号 H01L21/822;H01L27/06;H01L29/78;H01L29/786 主分类号 H01L21/822
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