| 摘要 |
A phase interpolation module comprising a first, second, and third phase interpolation units is proposed. Each of the first, second, and third phase interpolation units comprises a first through third inverters, a first and second resistors, wherein the first resistor is coupled between an output end of the first inverter and an input end of the third inverter, and the second resistor is coupled between an output end of the second inverter and the input end of the third inverter. The first and second inverters of the first phase interpolation unit receive a first signal, the first and second inverters of the third phase interpolation unit receive a second signal, and the first and second inverters of the second phase interpolation unit respectively receive the first and second signals.
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