发明名称 Discrete time direct sampling circuit and receiver
摘要 Provided are a direct sampling circuit and a receiver using a discrete time analog process and having a filter effect of a steep attenuation characteristic in a narrow-pass band without lowering a sampling rate. In a discrete time direct sampling circuit (13), the positive phase side and the inverse phase side are both sampled by a local signal for a differential current output of a differential voltage/current conversion unit (1011) and electric charge is accumulated in a charge sampling capacitor. The latest accumulated charge at the positive phase side and charge accumulated at the inverse phase side before a predetermined number of samples are combined with the charge accumulated in a history capacitor (1043) in the past. Thus, it is possible to realize equivalently high-degree FIR filter characteristic.
申请公布号 US8385874(B2) 申请公布日期 2013.02.26
申请号 US20080529900 申请日期 2008.03.03
申请人 PANASONIC CORPORATION;ABE KATSUAKI;HOSOKAWA YOSHIFUMI;NAITO YASUYUKI;MIYANO KENTARO;SAITO NORIAKI 发明人 ABE KATSUAKI;HOSOKAWA YOSHIFUMI;NAITO YASUYUKI;MIYANO KENTARO;SAITO NORIAKI
分类号 H04B1/26 主分类号 H04B1/26
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