发明名称 |
Memory circuit and method of operating the same |
摘要 |
The present application discloses a memory circuit having a first data line configured to carry a first data line signal and a second data line configured to carry a second data line signal. Further, a first driver is coupled to the first data line and the second data line and configured to establish a first current path for the first data line responsive to the second data line signal. Similarly, a second driver is coupled to the first data line and the second data line and configured to establish a second current path for the second data line responsive to the first data line signal. The memory circuit further has a first driver enabling line configured to selectively enable the first driver and a second driver enabling line configured to selectively enable the second driver.
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申请公布号 |
US8385136(B2) |
申请公布日期 |
2013.02.26 |
申请号 |
US20100913087 |
申请日期 |
2010.10.27 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.;LEE CHENG HUNG;YANG JUNG-PING |
发明人 |
LEE CHENG HUNG;YANG JUNG-PING |
分类号 |
G11C5/14 |
主分类号 |
G11C5/14 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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