发明名称 Nonvolatile memory circuit using spin MOS transistors
摘要 Certain embodiments provide a nonvolatile memory circuit in which a first p-channel MOS transistor and a first n-channel spin MOS transistor are connected in series, a second p-channel MOS transistor and a second n-channel spin MOS transistor are connected in series, gates of the first p-channel MOS transistor and the first n-channel spin MOS transistor are connected, gates of the second p-channel MOS transistor and the second n-channel spin MOS transistor are connected, a first n-channel transistor includes a drain connected to a drain of the first p-channel transistor and the gate of the second p-channel transistor, a second n-channel transistor includes a drain connected to a drain of the second p-channel transistor and the gate of the first p-channel transistor, and gates of the first and second n-channel transistors are connected.
申请公布号 US8385114(B2) 申请公布日期 2013.02.26
申请号 US201213360904 申请日期 2012.01.30
申请人 KABUSHIKI KAISHA TOSHIBA;SUGIYAMA HIDEYUKI;TANAMOTO TETSUFUMI;MARUKAME TAKAO;ISHIKAWA MIZUE;INOKUCHI TOMOAKI;SAITO YOSHIAKI 发明人 SUGIYAMA HIDEYUKI;TANAMOTO TETSUFUMI;MARUKAME TAKAO;ISHIKAWA MIZUE;INOKUCHI TOMOAKI;SAITO YOSHIAKI
分类号 G11C11/14 主分类号 G11C11/14
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