发明名称 Variable resistance memory with lattice array using enclosing transistors
摘要 A variable resistance memory array, programming a variable resistance memory element and methods of forming the array. A variable resistance memory array is formed with a plurality of word line transistors surrounding each phase change memory element. To program a selected variable resistance memory element, all of the bitlines are grounded or biased at the same voltage. A top electrode select line that is in contact with the selected variable resistance memory element is selected. The word line having the word line transistors surrounding the selected variable resistance memory element are turned on to supply programming current to the element. Current flows from the selected top electrode select line through the variable resistance memory element into the common source/drain region of the surrounding word line transistors, across the transistors to the nearest bitline contacts. The word lines are patterned in various lattice configurations.
申请公布号 US8385112(B2) 申请公布日期 2013.02.26
申请号 US20100888201 申请日期 2010.09.22
申请人 MICRON TECHNOLOGY, INC.;LIU JUN 发明人 LIU JUN
分类号 G11C5/02;G11C5/06 主分类号 G11C5/02
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