发明名称 |
Ferroelectric memory devices and operating methods thereof |
摘要 |
A ferroelectric memory device having a NAND array of a plurality of ferroelectric memory cells includes: a fully depleted channel layer; a gate electrode layer; and a ferroelectric layer located between the channel layer and the gate electrode layer. The data of the plurality of ferroelectric memory cells is erased by applying a first erase voltage to a bit line and a common source line and applying a second erase voltage to a string selection line and a ground selection line.
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申请公布号 |
US8385098(B2) |
申请公布日期 |
2013.02.26 |
申请号 |
US20100923131 |
申请日期 |
2010.09.03 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD.;HONG KI-HA;KIM JEONG-SEOB;SHIN JAI-KWANG |
发明人 |
HONG KI-HA;KIM JEONG-SEOB;SHIN JAI-KWANG |
分类号 |
G11C11/22 |
主分类号 |
G11C11/22 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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