发明名称 Circuit of Recoverying Clock and Video Signal Receiver and Liquid Crystal Display System including the same
摘要 A circuit of recovering a clock, and a video signal receiver and an LCD(Liquid Crystal Display) device including the same are provided to maintain a stable frequency state of a recovered data clock by constantly maintaining a synchronized frequency using a phase locked loop scheme. A circuit of recovering a clock includes an input terminal for inputting a first clock, a phase locked loop unit(52) for generating a second clock synchronized with the first clock, and a loop controller(106) for controlling the phase locked loop unit using the first clock. The phase locked loop unit includes a voltage control oscillator(104), a phase difference detector(100), and a sample-hold unit(102). The voltage control oscillator generates the second clock. The phase difference detector supplies a control voltage, which is based on a phase difference between the first and second clocks, to the voltage control oscillator. The sample-hold unit samples the control voltage and holds the sampled control voltage under control of the loop controller.
申请公布号 KR101237192(B1) 申请公布日期 2013.02.25
申请号 KR20060020811 申请日期 2006.03.06
申请人 发明人
分类号 G02F1/133;G09G3/20;G09G3/36;H03L7/08 主分类号 G02F1/133
代理机构 代理人
主权项
地址