发明名称 |
SEMICONDUCTOR DEVICE HAVING DELAY LINE |
摘要 |
Disclosed herein is a device that includes a plurality of one-shot pulse generation circuits connected in series between an input node and an output node. Each of the one-shot pulse generation circuits receives an input clock signal supplied from previously connected one-shot pulse generation circuit to output an output clock signal to subsequently connected one-shot pulse generation circuit. Both of a rising edge and a falling edge of the output clock signal are controlled based on one of a rising edge and a falling edge of the input clock signal. A time period from one of the rising edge and the falling edge of the output clock signal to the other of the rising edge and the falling edge of the output clock signal being variable.
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申请公布号 |
US2013043919(A1) |
申请公布日期 |
2013.02.21 |
申请号 |
US201213585110 |
申请日期 |
2012.08.14 |
申请人 |
ELPIDA MEMORY, INC.;KITAGAWA KATSUHIRO |
发明人 |
KITAGAWA KATSUHIRO |
分类号 |
H03L7/06;H03L7/00 |
主分类号 |
H03L7/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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