CIRCUIT FOR HIGH-SPEED DUTY RATIO REGULATION AND DOUBLE-END TO SINGLE-END CONVERSION OF PHASE-LOCKED LOOP

摘要

Disclosed is a circuit for high-speed duty ratio regulation and double-end to single-end conversion of a phase-locked loop, which comprises three parts: a first stage of input waveform shaping, a second stage of a single edge detection circuit, and a third stage of a duty ratio recovery circuit. The technical solution allows double-ended signals outputted by a voltage-controlled oscillator of the phase-locked loop to be converted into single-ended signals. In addition, the duty ratio of the waveform outputted by the voltage-controlled oscillator of the phase-locked loop can be regulated to 50 percent, thereby outputting single-ended clock signals having a duty ratio of 50 percent.