发明名称 SYMBOL TIMING RECOVERY CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a symbol timing recovery circuit capable of preventing accuracy deterioration by an interference wave. <P>SOLUTION: A symbol timing recovery circuit comprises: an interpolator (14) which generates interpolation data for a zero-cross point and/or data identification point of an input digital signal using a first filter; a forward equalizer (21) which removes a forward interference wave from the input digital signal on the basis of the interpolation data generated by the interpolator using a second filter and outputs the removed signal, a first identification signal, and a first error signal; a backward equalizer (23) which removes a backward interference wave from the input digital signal on the basis of the interpolation data generated by the interpolator using a third filter and outputs the removed signal, a second identification signal, and a second error signal; and a timing regeneration unit (20) which generates a tap coefficient of the first filter on the basis of a tap coefficient of the second filter, a tap coefficient of the third filter, the first identification signal, the first error signal, the second identification signal, and the second error signal. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013038505(A) 申请公布日期 2013.02.21
申请号 JP20110171056 申请日期 2011.08.04
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 KITSUTA TATSUAKI
分类号 H04B7/005;H04B1/16;H04B3/06;H04L27/01 主分类号 H04B7/005
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