发明名称 METHOD OF MAKING AN INSULATED GATE SEMICONDUCTOR DEVICE WITH SOURCE-SUBSTRATE CONNECTION AND STRUCTURE
摘要 In one embodiment, a source-down vertical insulated gate field effect transistor includes a source contact that is buried within a trench gate structure. Dopant of a first conductivity type is diffused from the conductive source contact into an adjacent semiconductor layer that has a second and opposite conductivity type to form source regions. A self-aligned metal contact is formed within the trench gate structure to short the source contact and the source regions to an underlying substrate.
申请公布号 US2013043526(A1) 申请公布日期 2013.02.21
申请号 US201113210238 申请日期 2011.08.15
申请人 IYER DORAI;GRIVNA GORDON M.;PEARSE JEFFREY 发明人 IYER DORAI;GRIVNA GORDON M.;PEARSE JEFFREY
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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