| 摘要 |
1281933 Integrated circuit manufacture INTERNATIONAL BUSINESS MACHINES CORP 30 Oct 1969 [19 Nov 1968 (4)] 53126/69 Heading H1K In a method of manufacturing an array of integrated circuits on a common semi-conductor wafer involving the use of masks in successive processing steps, a group of masks is made for each step, the location of faults on individual masks determined, and a set of masks selected with reference to this information to provide an optimum yield of good circuits from the method as a whole. Selection is made in such a way that the random faults occurring in the various masks are as far as possible in corresponding positions but it takes account, by weighting, of the fact that manufacturing defects not attributable to mask defects have a higher incidence at the periphery of the wafer than at its centre. Where the masks for the different steps vary in complexity and hence in the average number of faults per mask, this average is determined experimentally. The number of masks of the most complex group needed to give a required yield of good circuits is calculated, and then the correspondingly smaller number of the less complex masks to maintain this yield. Selection is made with the aid of a computer into which fault location and weighting information is fed, or optically by superimposition of transparent sheets with blocked-out areas corresponding to faulty areas in individual masks. In the latter case comparison may be made visually or with the aid of photo-cells. Optimum results are achieved by comparing all possible mask combinations at the outset but only marginally worse results can be obtained with far less expenditure of time by taking the best mask from the first group, selecting the mask of the second group which combines with it to give the best result, then choosing the mask of the third group combining best with the selected first and second masks and so on. When using this sequential technique the mask for a given step need only be chosen on completion of the preceding step, at which time more and possibly technically superior masks may have become available for selection. In the embodiment the masks are used for exposing photoresist in the formation of diffusion and electrode etching masks.
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