| 摘要 |
<p>PURPOSE: A method for manufacturing a transistor is provided to reduce aging time by removing a pixel searching stage. CONSTITUTION: A semiconductor layer(220) including a source region(222), a drain region(223), and an active region(221) is formed on the upper side of a substrate(210). A gate insulation layer(230) is formed on the upper side of the semiconductor layer. A gate electrode(240) is formed on the upper side of the gate insulation layer. An interlayer dielectric layer(250) is formed on the upper side of the gate electrode to expose the source region and the drain region. A source and drain metal(SDM) is formed on the upper side of the interlayer dielectric layer. A DC voltage is applied to the source and drain metal.</p> |
