发明名称 |
Integrated circuit testing apparatus and method |
摘要 |
A testing apparatus includes a test controller configured to output a plurality of chip selection signals for selecting chips to be tested from among a plurality of chips, a plurality of first control signals for controlling supply of a power supply voltage to the chips selected by the chip selection signals, and a plurality of second control signals for controlling receiving of test voltages output from the chips supplied with the power supply voltage, and a probe card including one or more test blocks each having a plurality of signal transmitters configured to respectively transfer the power supply voltage to the corresponding chips in response to the different first control signals and respectively apply the test voltages output from the corresponding chips to the test controller in response to the different second control signals.
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申请公布号 |
US8378698(B2) |
申请公布日期 |
2013.02.19 |
申请号 |
US20100798605 |
申请日期 |
2010.04.07 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD.;CHOI JAE-YOUNG;CHO CHANG-HYUN |
发明人 |
CHOI JAE-YOUNG;CHO CHANG-HYUN |
分类号 |
G01R31/20 |
主分类号 |
G01R31/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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