发明名称 High-speed BiCMOS double sampling track-and-hold amplifier circuit
摘要 A high-speed BiCMOS double sampling track-and-hold amplifier circuit, comprising an input buffer, two front-end switches, two sampling capacitors, two intermediate buffers, two feedback buffers, two back-end switches and an output buffer. The present invention forms a hold circuit featuring BiCMOS double sampling through the aforementioned components so as to reduce complexities in designing the sampling circuit and the output buffer within the BiCMOS track-and-hold amplifier circuit by means of double sampling, thereby increasing the effective sampling rate to two times. Additionally, the high-speed BiCMOS double sampling track-and-hold amplifier circuit according to the present invention further employs the linearization technology to enhance the linearity of the input buffer in the BiCMOS double sampling track-and-hold amplifier circuit in order to improve the dynamic response of the integral BiCMOS double sampling track-and-hold amplifier circuit.
申请公布号 US8378717(B1) 申请公布日期 2013.02.19
申请号 US201113295279 申请日期 2011.11.14
申请人 NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY;TSAI SHUN-HUNG;LIN HUNG-YI 发明人 TSAI SHUN-HUNG;LIN HUNG-YI
分类号 G11C27/02;H03K5/00 主分类号 G11C27/02
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