发明名称 TRANSMISSION CIRCUIT, RECEPTION CIRCUIT, TRANSMISSION/RECEPTION SYSTEM, METHOD FOR CONTROLLING TRANSMISSION/RECEPTION SYSTEM
摘要 A transmission circuit is provided with a buffer which stores packets transmitted to a reception circuit, a processing unit which, upon receiving a retransmission request including processing pattern information for designating the processing pattern of the packets from the reception circuit, reads a packet to be retransmitted from the buffer and performs the processing pattern designated by the processing pattern information on the packet to be retransmitted, and an output unit which outputs the processed packet to be transmitted to the reception circuit. The reception circuit is provided with a buffer which stores an initial packet which has already been received from the transmission circuit, a retransmission requesting means which requests the retransmission of a packet from the transmission circuit, a recovery unit which recovers the retransmitted packet processed by the transmission circuit to the state prior to the processing, and a compensation unit which combines the initial packet and the recovered retransmitted packet to constitute a packet.
申请公布号 WO2013021442(A1) 申请公布日期 2013.02.14
申请号 WO2011JP67991 申请日期 2011.08.05
申请人 FUJITSU LIMITED;KUSACHI, SOUTA 发明人 KUSACHI, SOUTA
分类号 H04L1/16 主分类号 H04L1/16
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