| 摘要 |
A clock generating circuit includes: a phase detector for detecting a phase difference between an input clock and a reference clock to generate a control signal corresponding to the phase difference; a controllable oscillator for generating a plurality of output clocks according to the control signal, wherein the plurality of output clocks correspond to an oscillating frequency and correspond to a plurality of different phases respectively; a phase selector for selecting an output clock as a feedback clock from the plurality of output clocks according to a phase select signal; a feedback circuit for generating the input clock according to the feedback clock; and a phase difference comparator for comparing the plurality of phases corresponding to the plurality of output clocks respectively with a data phase of a data signal to generate a compared result, and generating the phase select signal according to the compared result.
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