| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an interface circuit capable of improving throughput of data transfer between a CPU and a memory. <P>SOLUTION: An interface circuit 3 relating to the invention comprises: a read address generation part 12 for outputting a read address 52; an inversion information generation part 13 for preliminarily storing inversion information that shows whether to output read data 54 retrieved from a memory 2 in a non-inversion state or in an inversion state, and outputting inversion information 53 for the read data corresponding to the read address 52; an arithmetic circuit 14 for outputting an inversion signal on the basis of both the current inversion information 53 output from the inversion information generation part 13 and a previous inversion signal 55; and a data non-inversion/inversion part 15 for outputting the read data 54 in the non-inversion or inversion state, in response to an inversion signal 56 output from the arithmetic circuit 14. <P>COPYRIGHT: (C)2013,JPO&INPIT |
