发明名称 Semiconductor heterostructure
摘要 <p>The present invention relates to a semiconductor heterostructure comprising a support substrate with a first in-plane lattice parameter, a buffer structure formed on the support substrate and having on top in a relaxed state a second in-plane lattice parameter, and a multi-layer stack of ungraded layers formed on the buffer structure. It is the object of the present invention to provide a semiconductor hetero-structure of the above mentioned type with a lower surface roughness. The object is solved by a heterostructure of the above mentioned type, wherein said ungraded layers are strained layers, wherein said strained layers comprise at least one strained smoothing layer of a semiconductor material having in a relaxed state a third in-plane lattice parameter which is between the first and the second lattice parameter.</p>
申请公布号 EP1933384(B1) 申请公布日期 2013.02.13
申请号 EP20060291955 申请日期 2006.12.15
申请人 SOITEC 发明人 AULNETTE, CECILE;FIGUET, CHRISTOPHE
分类号 H01L29/15 主分类号 H01L29/15
代理机构 代理人
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