发明名称 |
Semiconductor device and method of manufacturing the same |
摘要 |
Technique of improving a manufacturing yield of a semiconductor device including a non-volatile memory cell in a split-gate structure is provided. A select gate electrode of a CG shunt portion is formed so that a second height d2 from the main surface of the semiconductor substrate of the select gate electrode of the CG shunt portion positioned in the feeding region is lower than a first height d1 of the select gate electrode from the main surface of the semiconductor substrate in a memory cell forming region.
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申请公布号 |
US8373216(B2) |
申请公布日期 |
2013.02.12 |
申请号 |
US20100913759 |
申请日期 |
2010.10.27 |
申请人 |
RENESAS ELECTRONICS CORPORATION;CHAKIHARA HIRAKU;ISHII YASUSHI |
发明人 |
CHAKIHARA HIRAKU;ISHII YASUSHI |
分类号 |
H01L29/94 |
主分类号 |
H01L29/94 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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