发明名称 |
Handling processor computational errors |
摘要 |
Embodiments include a computer processor-error controller, a computerized device, a device, an apparatus, and a method. A computer processor-error controller includes a monitoring circuit operable to detect a computational error corresponding to an execution of a second instruction by a processor operable to execute a sequence of program instructions that includes a first instruction that is fetched before the second instruction. The computer processor-error controller includes an error recovery circuit operable to restore an execution of the sequence of program instructions to the first instruction in response to the detected computational error.
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申请公布号 |
US8375247(B2) |
申请公布日期 |
2013.02.12 |
申请号 |
US20060364131 |
申请日期 |
2006.02.28 |
申请人 |
THE INVENTION SCIENCE FUND I, LLC;FERREN BRAN;HILLIS W. DANIEL;MANGIONE-SMITH WILLIAM HENRY;MYHRVOLD NATHAN P.;TEGREENE CLARENCE T.;WOOD, JR. LOWELL L. |
发明人 |
FERREN BRAN;HILLIS W. DANIEL;MANGIONE-SMITH WILLIAM HENRY;MYHRVOLD NATHAN P.;TEGREENE CLARENCE T.;WOOD, JR. LOWELL L. |
分类号 |
G06F11/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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地址 |
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