| 摘要 |
<p>PURPOSE:To enable to control the input and output unit having the data and status signal of arbitrary bit width, by providing a simple additional circuit. CONSTITUTION:The system consists of CPU 10, input and output unit 15 having the status signal S16 in 16-bit, input and output control circuit DCU11 largely integrated and its additional circuit. When CPU 10 feeds the command selecting the upper rank bit or lower rank bit of S16, the control line 111 is ''0'' or ''1'' according to the command, designating the gates 13 and 14. Next, when CPU 10 delivers the status request signal to the control circuit 12 via the signal line 112, the gate 13, 14 switching signal is made on the control lines 121 and 122, and the upper or lower rank bit of S12 is delivered to CPU 10 via the bus line 101. Thus, in DCU11, the transfer of information having long bit width is made possible by providing a simple additional circuit.</p> |
