发明名称 Parser Accelerator having hardware engine and method
摘要 PURPOSE: A parser accelerator having a hardware engine and a method thereof are provided to perform an additional work by parsing text-based input data to accelerator hardware and processing a token through the additional function of a dedicated hardware engine. CONSTITUTION: An accelerator(210) uses a host bus and a host controller to transmit and receive data, and parses text-based data of a main memory according to the notification from the host controller. A local memory(220) stores the data generated by the accelerator. When the accelerator parses the text-based data, a dedicated hardware engine(230) receives the parsed data of token type to perform an additional function in hardware way.
申请公布号 KR101231054(B1) 申请公布日期 2013.02.07
申请号 KR20080130709 申请日期 2008.12.19
申请人 发明人
分类号 G06F12/00;G06F13/16;G06F13/40;G06F17/20 主分类号 G06F12/00
代理机构 代理人
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