| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a binarization circuit capable of enhancing determination accuracy of a high level and a low level while suppressing a reduction in operating speed. <P>SOLUTION: A binarization circuit 20 includes: a peak-hold circuit 30 that has a diode 31 and a capacitor 32; a bottom-hold circuit 40 that has a diode 41 and a capacitor 42; a comparison circuit 70 that compares an average voltage VA of a voltage of a node N1 between the capacitor 32 and the diode 31 and a voltage of a node N2 between the capacitor 42 and the diode 41 and a voltage of an input signal Vin and binarizes the input signal Vin; and a reference-voltage generating circuit 60 that outputs a voltage proportional to the average voltage VA. The bottom-hold circuit 40 uses the voltage outputted from the reference-voltage generating circuit 60 as a reference potential VS. <P>COPYRIGHT: (C)2013,JPO&INPIT |
