| 发明名称 |
Techniques for Interconnecting Stacked Dies Using Connection Sites |
| 摘要 |
An integrated circuit die includes conductive connection sites located at least on a surface of the integrated circuit die within a contiguous region thereof. The integrated circuit also includes a core circuit located outside the contiguous region. The core circuit is coupled to at least one of the connection sites.
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| 申请公布号 |
US2013032950(A1) |
申请公布日期 |
2013.02.07 |
| 申请号 |
US201113641680 |
申请日期 |
2011.04.13 |
| 申请人 |
RAMBUS INC.;WARE FREDERICK A.;TSERN ELY;VOGELSANG THOMAS |
发明人 |
WARE FREDERICK A.;TSERN ELY;VOGELSANG THOMAS |
| 分类号 |
H01L23/48;H01L21/02 |
主分类号 |
H01L23/48 |
| 代理机构 |
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代理人 |
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| 主权项 |
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