| 摘要 |
A pixel circuit is disclosed that includes a video mode, a memory mode and an inversion mode of operation. The pixel circuit includes a pixel storage node for storing data to be output by a liquid crystal cell, a pixel write circuit configured to receive display data and provide the display data to the pixel storage node for storage thereon. Further, the pixel circuit includes a hold circuit operatively coupled to the pixel write circuit and configured to minimize leakage of charge from the pixel storage node through the pixel write circuit, and an internal inversion circuit operatively coupled to the hold circuit and the pixel storage node and configured to invert a voltage of the data stored on the pixel storage node and a voltage applied to a liquid crystal cell that receives data stored on the pixel storage node.
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