发明名称 |
Conductive Vias In A Substrate |
摘要 |
A method of forming a conductive via in a substrate includes forming a via hole covered by a dielectric layer followed by an annealing process. The dielectric layer can getter the mobile ions from the substrate. After removing the dielectric layer, a conductive material is formed in the via hole, forming a conductive via in the substrate.
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申请公布号 |
US2013034816(A1) |
申请公布日期 |
2013.02.07 |
申请号 |
US201113198354 |
申请日期 |
2011.08.04 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.;YU CHEN-HUA;YEH DER-CHYANG |
发明人 |
YU CHEN-HUA;YEH DER-CHYANG |
分类号 |
G03F7/20;B05D3/00;B05D5/12;H01K3/10 |
主分类号 |
G03F7/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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