发明名称 SEMICONDUCTOR DEVICE
摘要 <P>PROBLEM TO BE SOLVED: To normally operate a semiconductor device even if the semiconductor device is erroneously entered into a test mode. <P>SOLUTION: A semiconductor device comprises a test signal generation circuit 1 in which, in response to inputting a test mode entry signal that starts a test to a test circuit 2 for testing an internal circuit, an internal latch 10 is set to output from the latch 10 to the test circuit 2 a test enable signal permitting the test circuit 2 to be driven. The test signal generation circuit 1 includes a reset signal generation circuit 30 and a delay initialization circuit 40. In the case where the latch 10 is outputting the test enable signal, the reset signal generation circuit 30 delays the test enable signal to generate a reset signal for resetting the latch 10. In the case where the latch 10 is outputting the delay initialization signal, on the basis of a toggle signal supplied from the outside, the delay initialization circuit 40 outputs a delay initialization signal for initializing an operation to generate the reset signal by the reset signal generation circuit 30. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013029926(A) 申请公布日期 2013.02.07
申请号 JP20110164354 申请日期 2011.07.27
申请人 ELPIDA MEMORY INC 发明人 OKUNO SHINYA;FURUYA KIYOHIRO
分类号 G06F1/26;G01R31/28;G01R31/3185;G11C29/14;H01L21/822;H01L27/04 主分类号 G06F1/26
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