发明名称 METHOD OF MANUFACTURING MULTILAYER WIRING BOARD, AND WAFER BATCH CONTACT BOARD
摘要 <P>PROBLEM TO BE SOLVED: To provide a multilayer wiring board that has wiring layers laminated with an insulating layer interposed, and is small in warpage amount, and a method of manufacturing the same. <P>SOLUTION: There is provided the method of manufacturing the multilayer wiring board which has a plurality of wiring layers laminated with the insulating layer interposed, and also electrically connected to each other through an opening part formed in the insulating layer, the method including a process of using a glass substrate 51, and forming a compression stress layer 40A on a first surface of the glass substrate 51 and a compression stress layer 40B on a second surface; a wiring pattern forming process of forming a first wiring pattern 52a on a surface of the compression stress layer 40A; an insulating layer forming process of forming an insulating layer 53 on the first wiring pattern 52a; an opening part forming process of forming an opening part 54 for electrically connecting the upper and lower wiring layers in the insulating layer 53; and a process of repeating the wiring pattern forming process, insulating layer forming process, and opening part forming process a plurality of times. Further, the method includes a compression stress layer removing process of removing the second surface compression stress layer 40B on the glass substrate 51 by a predetermined thickness. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013029431(A) 申请公布日期 2013.02.07
申请号 JP20110166056 申请日期 2011.07.28
申请人 HOYA CORP 发明人 SUGIHARA OSAMU
分类号 G01R1/06;G01R1/073;H01L21/66 主分类号 G01R1/06
代理机构 代理人
主权项
地址