发明名称
摘要 The problem is to reduce an unnecessary memory access which occurs in the conventional information processing apparatus and to prevent a burden on a memory band. To solve the problem, a memory control apparatus, in a case of receiving from the processor, under a condition where the number of cache memories retaining a copy of data stored in a main storage device is one, a notification to the effect that data retained in the cache memory is purged, updates directory information on a directory cache without accessing the main storage device when the data is not modified by the processor, and the directory information on the directory cache and directory information on the main storage device is determined to be different and the directory information on the main storage device is determined to be in a state indicating that the copy of the data is not retained by any processor in the state of coherence.
申请公布号 JP5136652(B2) 申请公布日期 2013.02.06
申请号 JP20100536633 申请日期 2008.11.10
申请人 发明人
分类号 G06F12/08 主分类号 G06F12/08
代理机构 代理人
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