PREVENTING DEVICE FOR FOUL WRITING TO MAIN MEMORY

摘要

PURPOSE:To prevent the foul writing and to improve the reliability of a device applying a microprocessor by inhibiting the writing for each area of a main memory. CONSTITUTION:A CPU21 activates a main memory writing signal line 26 and also supplies the address information to an auxiliary memory 25. The permission/inhibition information for writing to a main memory 22 is impressed to a gate 24 with the output data of the memory 25. When this information is set at ''1'', the state of the line 26 is transmitted as it is to a signal line 28. Then the data is written to the memory 22. In this case, the state of the line 26 is not transmitted to the line 28 in case the data 36 delivered from the memory 25 in response to upper 8 bits of the address information given from the CPU21 is set at ''0''. As a result, the foul writing is prevented to the memory 22. In addition, an interruption is applied to the CPU21 by a signal line 27 to inform the foul writing.