发明名称 DATA PROCESSOR
摘要 PURPOSE:To recover an instantaneous fault of an RAM and to improve the reliability of a data processor by using an RAM and an EPROM to a program memory and a back-up memory respectively. CONSTITUTION:''1'' is added to the count value of a retrial counter every time a parity error FF9 is set. The contents of an address register 11 are supplied to an address back-up register 12. Then the contents of a back-up memory EPROM 5 are read out by the address given from the register 12 and then written to a program memory RAM4. In a retrial mode the contents of the RAM4 are read out by the address of the contents of the register 11 and then written to an instruction register 7 to perform a parity check.
申请公布号 JPS59231798(A) 申请公布日期 1984.12.26
申请号 JP19830106062 申请日期 1983.06.14
申请人 MITSUBISHI DENKI KK 发明人 SHIMOMA YOSHIKI
分类号 G06F12/16;G11C29/00;(IPC1-7):G11C29/00 主分类号 G06F12/16
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