发明名称 INTERFACE CIRCUIT
摘要 PURPOSE:To connect a circuit, even a CPU whose processing speed is high, to a non-family IC, by using the interface circuit of a simple constitution which is operated by a signal from the CPU. CONSTITUTION:An interface 4 is constituted mainly of D-flip-flops (D-F.F) 8, 10 for forming a wait circuit, an AND circuit 11, and a D-F.F 6 for forming an enable signal generating circuit. The driver 2 of a non-family IC whose signal timing is different from that of a CPU 1 is connected to the enable terminal of the CPU 1 through the interface 4. Through the decoding circuit 3 of the CPU 1 side, a chip select signal is inputted to the interface 4, and a wait signal is outputted to the CPU 1 by the operation of the wait circuit. The clock of a prescribed frequency is supplied from an oscillator 13 and the CPU 1 operates the driver 2.
申请公布号 JPS62262167(A) 申请公布日期 1987.11.14
申请号 JP19860105743 申请日期 1986.05.08
申请人 ALPS ELECTRIC CO LTD 发明人 KOTAKI YOSHIKAZU
分类号 G06F13/42 主分类号 G06F13/42
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