| 摘要 |
Various embodiments of a data output circuit of a semiconductor memory and related method are disclosed. In one exemplary embodiment, a data output circuit may include a plurality of global lines, a sense amplifier block configured to output a plurality of data to the plurality of global lines at different timings, a pipe latch block configured to latch the plurality of data transmitted through the plurality of global lines at different timings, and a control unit configured to control output timings of the plurality of data from the sense amplifier block and latch timings of the pipe latch block using an address signal.
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