Manufacturing method for forming a MOS transistor by self-alignment of the source/drain regions.

摘要

This invention discloses a semiconductor integrated circuit in which an input protecting circuit and an inner circuit are formed on a single semiconductor substrate and a MOS transistor of the inner circuit is formed by self-alignment. The source and drain regions (33, 34) of the MOS transistor of the input protecting circuit are formed by self-alignment, so that the impurity concentration of the source and drain regions (33, 34) is increased and the diffusion resistance thereof is reduced, thereby increasing the junction breakdown power caused by a drain current. In addition, the radii of curvature of the junction curved surface portions of the source and drain regions (33, 34) of the MOS transistor of the input protecting circuit are increased so as to reduce the electric field intensity at the junction curved surface portions, thereby improving the junction breakdown withstand characteristics.