发明名称 System and method for testing off-chip driver impedance
摘要 A testing circuit for verifying the impedance of off-chip drivers includes: a plurality of off-chip drivers (OCD), each off-chip driver including a through-silicon via (TSV); an IREF test pad, for driving a current to the plurality of off-chip drivers; a plurality of pre-drivers, each respective pre-driver coupled to one of the plurality of off-chip drivers, wherein the plurality of pre-drivers are configured to turn on the off-chip drivers; a VREF test pad, for inputting a reference voltage to the testing circuit; a plurality of input buffers (IB) for outputting a plurality of comparison results, each of the plurality of input buffers configured to output the plurality of comparison results according to the reference voltage and the voltage at the TSV nodes; and a test pad, coupled to the plurality of IBs, for receiving the comparison results to determine whether the impedance of each OCD is within a desired range.
申请公布号 US8368422(B1) 申请公布日期 2013.02.05
申请号 US201213463832 申请日期 2012.05.04
申请人 NANYA TECHNOLOGY CORP.;DALE BRET ROBERTS;KIEHL OLIVER 发明人 DALE BRET ROBERTS;KIEHL OLIVER
分类号 H03K19/00 主分类号 H03K19/00
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