发明名称 Arbitration in crossbar interconnect for low latency
摘要 A system and method and computer program product for reducing the latency of signals communicated through a crossbar switch, the method including using at slave arbitration logic devices associated with Slave devices for which access is requested from one or more Master devices, two or more priority vector signals cycled among their use every clock cycle for selecting one of the requesting Master devices and updates the respective priority vector signal used every clock cycle. Similarly, each Master for which access is requested from one or more Slave devices, can have two or more priority vectors and can cycle among their use every clock cycle to further reduce latency and increase throughput performance via the crossbar.
申请公布号 US8370551(B2) 申请公布日期 2013.02.05
申请号 US20100684287 申请日期 2010.01.08
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION;OHMACHT MARTIN;SUGAVANAM KRISHNAN 发明人 OHMACHT MARTIN;SUGAVANAM KRISHNAN
分类号 G06F13/00;G06F13/36;G06F13/368 主分类号 G06F13/00
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