发明名称 |
Semiconductor device including arrangement to control connection height and alignment between a plurity of stacked semiconductor chips |
摘要 |
A semiconductor device having stacked semiconductor chips is provided wherein alignment of even thin semiconductor chips of a large warpage is easy and thus high assembling accuracy and high reliability are ensured. Semiconductor chips having hollow through-silicon via electrodes each formed with a tapered portion are melt-joined using solder balls each having a core of a material higher in melting point than solder. When melt-joining the semiconductor chips, the temperature is raised while imparting an urging load to stacked semiconductor chips, thereby correcting warpage of the semiconductor chips. In each chip-to-chip connection thus formed, if the connection is to prevent the occurrence of stress around the electrode due to the urging load, a solder ball having a core of a smaller diameter than in the other connections is used in the connection. |
申请公布号 |
US8368195(B2) |
申请公布日期 |
2013.02.05 |
申请号 |
US20100652245 |
申请日期 |
2010.01.05 |
申请人 |
HITACHI METALS, LTD.;TANIE HISASHI;ITABASHI TAKEYUKI;CHIWATA NOBUHIKO;WAKANO MOTOKI |
发明人 |
TANIE HISASHI;ITABASHI TAKEYUKI;CHIWATA NOBUHIKO;WAKANO MOTOKI |
分类号 |
H01L23/02 |
主分类号 |
H01L23/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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