发明名称 SEMICONDUCTOR MEMORY AND CONTROL METHOD OF SEMICONDUCTOR MEMORY
摘要 <P>PROBLEM TO BE SOLVED: To write data securely. <P>SOLUTION: An assist line AL0a is formed between a pair of bit lines BL0a, XBL0a for an A port connected to a memory cell C00. A write amplifier controls potentials of the bit line BL0a and an inversion bit line XBL0a based on write data and a write control signal. The write amplifier turns the inversion bit line XBL0a transited to an L level from an H level, to the floating state. An assist control makes the assist line AL0a to steeply fall down to the L level from the H level based on the write control signal. The potential of the inversion bit line XBL0a in the floating state is furthermore reduced from a power source voltage VSS level (L level) at a low potential side by a potential change of a capacity coupled assist line AL0a. <P>COPYRIGHT: (C)2013,JPO&INPIT
申请公布号 JP2013025848(A) 申请公布日期 2013.02.04
申请号 JP20110160996 申请日期 2011.07.22
申请人 FUJITSU SEMICONDUCTOR LTD 发明人 OKUMURA TADASHI
分类号 G11C11/41;G11C11/413 主分类号 G11C11/41
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