发明名称 SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER
摘要 PURPOSE: A SAR(Successive Approximation Register) ADC(Analog To Digital Converter) is provided to reduce an installation space by using voltage division resistance instead of using a capacitor array. CONSTITUTION: A preamp part(210) includes first and second MOS transistors(M1,M2) differentially amplify a positive input voltage and a negative input voltage, respectively. A digital/analog converter(240) includes third and fourth MOS transistors(M3,M4) which differentially amplify the output voltage of a voltage divider(241). A SAR control unit(230) outputs a distribution voltage selection signal for selecting a positive DA voltage and a negative DA voltage according to output bit values of a quantizer(220). The quantizer outputs bit values by comparing output currents. The D/A converter selects the positive DA voltage and the negative DA voltage according to the distribution voltage selection signal. The D/A converter changes the output current by differentially amplifying the selected voltage.
申请公布号 KR101228827(B1) 申请公布日期 2013.02.01
申请号 KR20100135721 申请日期 2010.12.27
申请人 发明人
分类号 H03M1/38 主分类号 H03M1/38
代理机构 代理人
主权项
地址