发明名称 PROCESSING APPARATUS, TEST SIGNAL GENERATOR, AND METHOD OF GENERATING TEST SIGNAL
摘要 A first test signal receiver that receives first test signals output from a first test signal output terminal in response to a test start instruction; a decision maker that determines whether or not the first test signals are being input to a tested portion; a second test signal output terminal that outputs a second test signal if the decision maker determines that the first test signals are not being input; and an increment processor that increments a count value stored by a counter that counts the count value used for flow control, in sync with the second test signal, are provided, thereby providing a technique which can load an tested target effectively during a load test.
申请公布号 US2013031412(A1) 申请公布日期 2013.01.31
申请号 US201213483232 申请日期 2012.05.30
申请人 FUJITSU LIMITED;IWASAKI SHINICHI 发明人 IWASAKI SHINICHI
分类号 G06F11/28 主分类号 G06F11/28
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