发明名称 |
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE |
摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor device provided with a configuration capable of sufficiently reducing parasitic capacitance between wires. <P>SOLUTION: A thin-film transistor having a bottom gate structure uses a laminate composed of a first layer obtained by oxidizing part or all of a metal thin-film and an oxide semiconductor layer. An oxide insulating layer which is to serve as a channel protective layer in contact with the top of that part of the oxide semiconductor layer which overlaps a gate electrode layer is formed. When the insulating layer is formed, an oxide insulating layer covering a peripheral edge portion (including a side surface) of the laminate of the oxide semiconductor layers is formed. <P>COPYRIGHT: (C)2013,JPO&INPIT |
申请公布号 |
JP2013021344(A) |
申请公布日期 |
2013.01.31 |
申请号 |
JP20120189552 |
申请日期 |
2012.08.30 |
申请人 |
SEMICONDUCTOR ENERGY LAB CO LTD |
发明人 |
YAMAZAKI SHUNPEI;SAKATA JUNICHIRO;OHARA HIROKI;KUWABARA HIDEAKI |
分类号 |
H01L21/336;H01L21/203;H01L29/786;H01L51/50;H05B33/10;H05B33/14 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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