发明名称 THRESHOLD ADJUSTMENT OF TRANSISTORS BY CONTROLLED S/D UNDERLAP
摘要 <p>Roughly described, an integrated circuit device has formed on a substrate a plurality of transistors including a first subset of at least one transistor and a second subset of at least one transistor, wherein all of the transistors in the first subset have one underlap distance and all of the transistors in the second subset have a different underlap distance. The transistors in the first and second subsets preferably have different threshold voltages, and preferably realize different points on the high performance/low power tradeoff.</p>
申请公布号 WO2013016089(A1) 申请公布日期 2013.01.31
申请号 WO2012US47120 申请日期 2012.07.18
申请人 SYNOPSYS, INC.;MOROZ, VICTOR;SPROCH, JAMES, D. 发明人 MOROZ, VICTOR;SPROCH, JAMES, D.
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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