An integrated circuit structure with a boron phosphorus silicate glass composite layer on semiconductor wafer and improved method for forming same

摘要

A composite boron phosphorus silicate glass (BPSG) insulating and planarizing layer (40) is formed over stepped surfaces (20,24) of a semiconductor wafer (10) by a two step process. The composite BPSG layer (40) is characterized by the absence of discernible voids and a surface which is resistant to loss ot boron in a subsequent etching step. The two step deposition process comprises a first step to form a void-free BPSG layer (40) by a CVD deposition using gaseous sources of phosphorus and boron dopants and tetraethylorthosilicate (TEOS) as the source of silicon; and then a second step to form a capping layer (50) of BPSG by a plasma-assisted CVD deposition process while again using gaseous sources of phosphorus and boron dopants, and TEOS as the source of silicon, to provide a BPSG cap layer (50) having a surface which is non-hygroscopic and resistant to loss of boron by subsequent etching.