| 摘要 |
A timing generating circuit (9) receives a reference signal (fREF) and an operation control signal (S0) as inputs and outputs a generation control signal (S1). The generation control signal (S1) is inputted to the prescaler (31), the programmable divider (41) and a phase comparator (51). The generation control signal (S1) goes "H" when the operation control signal (S0) goes "H" and then the reference signal (fREF) is counted predetermined times, and a raw signal (fRAW) is divided to start generating a signal to be measured (f0) after the generation control signal (S1) goes "H", so that a phase difference delta between the reference signal (fREF) and the signal to be measured (f0) at the start is constant irrespective of the timing of the operation control signal (S0) attaining "H". Accordingly, it is not necessary to set the timing of the operation control signal (S0) attaining "H" considerably earlier prior to a period required in the time-division telegraphy, and the power consumption of a prescaler (31) and a programmable divider (41) are suppressed.
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