Video display processor with pixel by pixel hardware scrolling

摘要

A video display processor and system supports hardware scrolling of the display. Horizontal and vertical scroll registers control the base address of the memory storing the display data. The horizontal scroll register resets a horizontal state register at the beginning of each horizontal line of a raster scan display. The horizontal state register counts for each pixel of the horizontal line. The vertical scroll register resets a vertical state register at the beginning of each screen of the display. The vertical state register counts for each line. Addressing logic uses the horizontal state register and the vertical state register for recalling display data from memory. This recalled display data controls the contents of a video display. The display may be scrolled horizontally or vertically by a host processor writing into the scroll registers. A display priority logic and sprite registers permits mobile sprites to be overlain upon the base display.